Memory device

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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Details

C365S233100, C365S189050

Reexamination Certificate

active

07969816

ABSTRACT:
Systems and methods for reading data from or writing data to a memory device. The methods involve receiving a first pulse signal having a first pulse frequency at the memory device. The methods also involve generating, at the memory device, a second pulse signal using the first pulse signal. The second pulse signal is a compliment of the first pulse signal. The second pulse signal has a second pulse frequency that is equal to the first frequency. The fist pulse signal is used to control first read/write operations so that first data is output from or input to the memory device at a first data rate. The first and second pulse signals are used to control second read/write operations so that second data is output from or input to the memory device at a second data rate. The second data rate is twice the first data rate.

REFERENCES:
patent: 6166990 (2000-12-01), Ooishi et al.
patent: 2001126474 (2001-05-01), None
patent: 2001189077 (2001-07-01), None
patent: 2005182904 (2005-07-01), None

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