Memory device

Details Memory device Memory device

1987-12-22

1989-11-14

Fears, Terrell W.

Static information storage and retrieval

Powering

Conservation of power

36518904, 365218, 365193, G11C 1300

Patent

active

048812064

ABSTRACT:
The memory device of this invention comprises a plurality of banks to which common address/data lines are connected, bank-selecting means for selectively feeding data read/write control signals to each bank, and a plurality of circuits for simultaneously feeding control signals to all banks, so that above constitution allows the memory device to simultaneously feed control signals to all the banks when erasing the entire memory content, thus making it possible for the memory device to effectively erase the entire memory content at an extremely high speed.

REFERENCES:
patent: 4716544 (1987-12-01), Bartley
patent: 4813021 (1989-03-01), Kai et al.
"1-Mbit Dram controller shuns complex timing and protocol to streamline high speed systems" by Z. Amitai, May 1, 1986, Electronic Design.

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