Static information storage and retrieval – Floating gate
Patent
1999-02-10
1999-11-09
Phan, Trong
Static information storage and retrieval
Floating gate
36518511, 36518529, 365218, G11C 1604
Patent
active
059826614
ABSTRACT:
The present invention is a non-volatile memory comprising: first and second floating gate MOS transistors which are electrically written and erased and which are operatively connected between power sources serially; and an output terminal connected to the contact point of the first and second MOS transistors; wherein a first datum is stored by writing to the first MOS transistor and erasing the second MOS transistor, and a second datum is stored by erasing the first MOS transistor and writing to the second MOS transistor. With the aforementioned memory device, through current does not flow to the power source, because only one transistor will be conductive even if read voltage is applied to the control gate of both transistors. Consequently, reading time can be shortened, without leading to increased power consumption, by maintaining the control gate at the read voltage level.
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patent: 5329487 (1994-07-01), Gupta et al.
patent: 5469381 (1995-11-01), Yamazaki
patent: 5740106 (1998-04-01), Nazarian
patent: 5812450 (1998-09-01), Sansbury et al.
Fujitsu Limited
Phan Trong
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