Memory device

Details Memory device Memory device

1983-05-12

1986-01-28

Edlow, Martin H.

357 59, 357 4, H01L 4500

Patent

active

045674990

ABSTRACT:
Memory device comprises a glass substrate (1), a layer of indium tin oxide (2), a layer of p type semiconductor (3), a layer of i type semiconductor (4), a layer of n type semiconductor (5) and a layer of spots of an electrically conducting material (6). Silicon is the preferred semiconductor. The device is conditioned by the application of a voltage sufficiently large to cause the structure to be permanently modified to reduce the electrical resistance of the layers.
It is a feature of the device that no p and n layers are adjacent.

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I.E.E. Proc., vol. 129, Pt. 1 Apr. 2, 1982, pp. 51-54, "New Amorphous-Silicon Electrically Programmable Nonvolatile Switching Device", Prof. A. E. Owen, P. G. LeComber, G. Sarrabayrouse and W. E. Spear.

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