Memory data synthesizer

Details Memory data synthesizer Memory data synthesizer

1991-12-09

1993-11-30

Weldon, Ulysses

Computer graphics processing and selective visual display system

Display peripheral interface input device

Light pen for fluid matrix display panel

345143, G09G 300

Patent

active

052669394

ABSTRACT:
A ROM part (24) of a charactor ROM (21) stores a plurality of font data. A display data RAM (9) simultaneously supplies a plurality of address signals to the charactor ROM (21) which is provided with a plurality of address decoders (25, 26). Respective address signals are decoded by the corresponding address decoders (25, 26), so that the font data corresponding to the address signals are read on the common bit lines (BL.sub.1 -BL.sub.l). Thus, the font data as read are synthesized on the common bit lines (BL.sub.1 -BL.sub.l) as a logical sum.

REFERENCES:
patent: 4079458 (1978-03-01), Rider et al.
patent: 4443794 (1984-04-01), Sakurai
patent: 4584573 (1986-04-01), Ito
patent: 4600920 (1986-07-01), Makita
patent: 4740783 (1988-04-01), Lawrence et al.
patent: 4816809 (1989-03-01), Kim
patent: 4835520 (1989-05-01), Aiello
patent: 4937565 (1990-06-01), Suwannukul
patent: 4992781 (1991-02-01), Iwasaki et al.
IBM Technical Disclosure Bulletin; vol. 24, No. 212, May 1982, pp. 6250-6251; Generation of Characters; P. A. Beaven and C. Williams.

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