Memory controller with ECC and data streaming control

Details Memory controller with ECC and data streaming control Memory controller with ECC and data streaming control

1992-10-14

1995-07-04

Envall, Jr., Roy N.

Excavating

371 402, H03M 1300

Patent

active

054307422

ABSTRACT:
Data is written to a memory subsystem in a computer system, wherein the data is supplied by an input/output (I/O) bus. The I/O bus provides a STROBE signal, the occurrence of which is indicative of a time when an I/O data word on the I/O bus is valid. A first I/O data word provided by the I/O bus, after a first occurrence of the STROBE signal, is stored in a data buffer. A memory data word is retrieved from the memory subsystem in response to the first occurrence of the STROBE signal. A second I/O data word provided by the I/O bus, after a second occurrence of the STROBE signal, is stored in the data buffer. The memory data word is modified by the first and second I/O data words to form a modified data word. Error detection information corresponding to the modified data word is generated and the modified data word and the error detection information are written to the memory subsystem.

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