Memory controller having automatic RAM detection

Details Memory controller having automatic RAM detection Memory controller having automatic RAM detection

1996-11-27

1998-05-26

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

057578176

ABSTRACT:
A system and method for automatically detecting the presence and configuration (e.g., number of rows and columns) of a writable memory module. A first data pattern is written to a first memory location. One or more data patterns different from the first data pattern are written to a second and subsequent memory locations in a walking-one sequence. After each write to the second and subsequent memory locations the data pattern at the first memory location is read. The read data pattern is compared to the first data pattern to determine if the first data pattern has been overwritten. The first data pattern is overwritten when the number of memory locations has been exceeded.

REFERENCES:
patent: 5539699 (1996-07-01), Sato et al.
patent: 5574857 (1996-11-01), Ramarkrishnan et al.

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