Memory controller for protected memory with automatic access gra

Details Memory controller for protected memory with automatic access gra Memory controller for protected memory with automatic access gra

1987-11-30

1990-06-26

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 900

Patent

active

049377361

ABSTRACT:
A method and apparatus for controlling access to data blocks stored by addresses in a memory and concurrently accessible by a plurality of transactions is provided. The method includes the steps of receiving an address of a data block to be accessed by a first transaction, deriving from the address an access table entry corresponding to the data block where the entry includes lock data that governs access to the data block, and providing the access if permitted by the lock data, or providing the access, if not permitted by the lock data, and recording the occurrence of the access in the lock data.

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"Check On Access Via Hierarchical Block Validation" IBM Technical Disclosure Bulletin, vol. 27, No. 7A, Dec. 1984, pp. 3752-3756.

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