Memory controller flexible timing control system and method

Details Memory controller flexible timing control system and method Memory controller flexible timing control system and method

1989-09-28

1994-01-04

LaRoche, Eugene R.

Static information storage and retrieval

Magnetic bubbles

Guide structure

395165, 395425, 36523009, 365233, G06F 106, G06F 108, G11C 800

Patent

active

052768562

ABSTRACT:
There is disclosed a system and method of controlling the timing in a system having a number of different elements, each requiring individual timing signals. The system utilizes a RAM memory divided into a number of groups or cycle types, each cycle type having a number of addressable words. The individual bits of each word serve to control the individual system elements. The memory is programmed to allow each group of words to control the system timing in a different manner. Provision is made for the memory to skip certain words in a particular group under control of externally provided signals.

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