Memory controller capable of estimating memory power...

Details Memory controller capable of estimating memory power... Memory controller capable of estimating memory power...

2008-01-01

2008-01-01

Lee, Thomas (Department: 2115)

Static information storage and retrieval

Addressing

Sync/clocking

C713S300000, C713S340000

Reexamination Certificate

active

11028543

ABSTRACT:
A memory controller capable of estimating memory power consumption includes a memory control unit, a command dispatch device, plural bank state machines and a power-state and current-accumulation device. The memory control unit generates control signals based on a memory access command sent by a system for accessing a synchronous dynamic random access memory (SDRAM). The command dispatch device synchronously receives the control signals sent by the controller to the SDRAM. The plural bank state machines are connected to the command dispatch device to receive the control signals dispatched by the command dispatch device and accordingly determine whether to transfer its internal state or not. The power-state and current-accumulation device determines on which state the SDRAM is in accordance with states of the plural band state machines, thereby computing current consumption of the SDRAM.

REFERENCES:
patent: 6615326 (2003-09-01), Lin
patent: 2005/0125703 (2005-06-01), Lefurgy et al.

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