Memory controller and method for dynamic page management

Details Memory controller and method for dynamic page management Memory controller and method for dynamic page management

1997-12-22

2000-04-18

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Interface

345508, 711 5, 711105, 365203, 3652385, G06F 1316

Patent

active

060521341

ABSTRACT:
A computer is provided having a memory system supporting page mode accessing. A memory controller may be provided in a bus interface unit coupled between a CPU bus, and a mezzanine bus, or PCI bus. The memory controller includes logic that provides for dynamic management of page accessing. The memory controller may include logic for monitoring the page hit:precharge ratio for accesses to system memory and dynamically switch between a paging state of operation and an auto-precharge state of operation according to the hit:precharge ratio. A configuration register may be provided to select dynamic mode in which the memory controller dynamically enables/disables paging to improve performance. The configuration register may also be programmed to manually enable/disable paging. The memory controller may include a page table for tracking open pages. The system memory may include SDRAM devices.

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