Memory controller and memory control system

Details Memory controller and memory control system Memory controller and memory control system

1997-01-29

1999-03-09

Eng, David Y.

G06F 922

Patent

active

058812644

ABSTRACT:
A memory controller provided on a multiprocessor system has a scoreboard used to manage the progress of memory access operations (the operating state of access instructions) and reduces the overhead in executing synchronization at a high level of execution priority. The scoreboard holds synchronization flags set in response to the acceptance of synchronization as well as the operation codes and addresses of the accepted access instructions. The memory controller sets a synchronization flag at the time when it has accepted a synchronizing instruction from the processor, and then resets the synchronization flag after the execution of the synchronizing operation has been completed.

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James Smith, "Dynamic Instruction Scheduling and the Astronautics ZS-1", 1989 IEEE.

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