Memory control system using plural buffer address arrays

Details Memory control system using plural buffer address arrays Memory control system using plural buffer address arrays

1975-10-08

1977-11-01

Thomas, James D.

Boots, shoes, and leggings

364900, G06F 1300

Patent

active

040568440

ABSTRACT:
In a data processing system in which a single main memory is shared by two or more basic processing units, each unit is provided with a first buffer address array which stores the addresses of data stored in the associated buffer memory and is searched by this processing unit and with second buffer address arrays which store the copy of the content of the first buffer address array and are searched by the store addresses from the other processing units, so that the information stored in the buffer memory of one processing unit may be prevented from becoming different from the information stored in the main memory when another processing unit performs a storing operation, without degrading the processing efficiency of the system.

REFERENCES:
patent: 3339183 (1967-08-01), Bock
patent: 3581291 (1971-05-01), Iwamoto
patent: 3618040 (1971-11-01), Iwamoto
patent: 3771137 (1973-11-01), Barner

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