Memory control system and picture decoder using the same

Television – Image signal processing circuitry specific to television – With details of static storage device

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348714, 348423, 348715, H04N 726

Patent

active

057293031

ABSTRACT:
In order to increase a coded data buffer size and provide an OSD area within a 16 Mbit memory for picture signals of NTSC and PAL systems, a display data area of the memory is made 2(N+1)/4N times a frame when a picture size is large.

REFERENCES:
patent: 4598284 (1986-07-01), Ikegami et al.
patent: 4980765 (1990-12-01), Kudo et al.
patent: 5353120 (1994-10-01), Lee
patent: 5386233 (1995-01-01), Keith
patent: 5623314 (1997-04-01), Retter et al.
Journal of Television Society of Japan, vol. 48, No. 1, pp. 44-49 (1994) entitled "MPEG 2/H.262" by Hiroshi Watanabe.
Vol. 48, No. 1, pp. 31-37 (1994) entitled "LSIs for Highly Efficient Video Coding" by Kiichi Matsuda et al.

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