Boots – shoes – and leggings
Patent
1976-06-07
1978-06-13
Chapnick, Melvin B.
Boots, shoes, and leggings
G06F 1300, G11C 700
Patent
active
040952657
ABSTRACT:
A memory control structure for a pipe-lined mini-processor which allows the processor to work with relatively slow memories without degradation of performance. The memory structure includes a memory selector which provides an interface between the processor output and the inputs of a plurality of memories of different types and speeds. The memory selector receives address and control information from the processor and generates the timing and selection signals for the memories. The memory structure also includes fan-in circuitry connected to the outputs of all the memories. The fan-in circuitry includes latches for sampling the output of each memory and multiplexing the memory outputs onto a single data bus for transfer of data from the memories to the processor.
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Chapnick Melvin B.
Henderson, Jr. John W.
International Business Machines - Corporation
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