Memory control device and memory control method

Details Memory control device and memory control method Memory control device and memory control method

2008-04-22

2008-04-22

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S063000, C365S189050

Reexamination Certificate

active

11640906

ABSTRACT:
There is provided memory control device and memory control method, which can prevent wiring complication by many crossing wirings, and reduction of yield and quality. When a memory control device CC1selects a memory chip CC2,an internal circuit of a select circuit27is changed by a switch signal SWS2.In this case, the changeover is made so that a select signal S2outputted from an internal circuit40is inputted to a predetermined memory terminal of the memory chip CC2.The select signal S2is inputted to the corresponding predetermined memory terminal of the memory chip CC2,and thereby, the memory chip CC2is activated, and set to a state capable of inputting and outputting control signals21to25.The control signals21to25are assigned to control terminals P21to P27after being hanged by the select circuit27in signal sequence corresponding to terminal array sequence of memory terminals21ato27aof the memory chip CC2.

REFERENCES:
patent: 6477671 (2002-11-01), Wada et al.
patent: 6704237 (2004-03-01), Park
patent: 6807109 (2004-10-01), Tomishima

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