Memory control device

Details Memory control device Memory control device

2007-03-27

2007-03-27

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S226000

Reexamination Certificate

active

11194935

ABSTRACT:
A memory control device controls data accesses to a memory which is composed of multiple banks and is switched between a normal mode for refreshing all banks and a power-saving mode for refreshing a bank. The memory control device includes: a setting information storage unit for storing a boundary address between memory areas to be and not to be refreshed in the power-saving mode; type information storage unit for receiving, from a CPU, and temporarily storing data information indicating whether data will be used in the power-saving mode; and an address converting unit for receiving a data access request from the CPU and converting, with reference to the boundary address, the address of requested data to an address inside or outside the refresh area depending of whether the data information indicates the data will or will not be used in the power-saving mode.

REFERENCES:
patent: 5307320 (1994-04-01), Farrer et al.
patent: 5619471 (1997-04-01), Nunziata
patent: 5761695 (1998-06-01), Maeda et al.
patent: 5881016 (1999-03-01), Kenkare et al.
patent: 6674684 (2004-01-01), Shen
patent: 9-81453 (1997-03-01), None

Affiliated with

Also associated with

Rating

Memory control device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory control device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory control device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3793180