Memory control circuitry

Details Memory control circuitry Memory control circuitry

1974-11-21

1976-06-08

Fears, Terrell W.

Communications: electrical

Digital comparator systems

340173FF, 340173RC, 307221C, G11C 1300

Patent

active

039626890

ABSTRACT:
A control circuit for reading from, and writing into, a random access memory into which successive data entries are stored at addresses in sequential binary order. A scan generator provides a repeated sequence of all sequential binary order addresses to the memory, and the write-enable input of the memory is controlled in synchronism with the memory addressing by continuously comparing the desired addresses of next-date entries with the scan generator addressing output, and enabling the write function of the memory when these addressing signals are the same.

REFERENCES:
patent: 3772658 (1973-11-01), Sarlo

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