Memory control circuit and semiconductor integrated circuit...

Details Memory control circuit and semiconductor integrated circuit... Memory control circuit and semiconductor integrated circuit...

2011-03-15

2011-03-15

Lam, David (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S193000, C365S194000

Reexamination Certificate

active

07907471

ABSTRACT:
A memory control circuit includes a clock generation circuit that generates a clock signal and provides the clock signal to an external memory device, and at least one retention circuit that retains a data signal provided from the external memory device only under a significant state of a data strobe signal, which is provided together with the data signal. The memory control circuit controls data acquisition from the retention circuit in accordance with the clock signal. A data acquisition timing judgment unit, by monitoring the clock signal, judges whether or not a timing of the data acquisition has arrived. A data strobe signal correction unit maintains the significant state of the data strobe signal until it is judged that the data acquisition timing has arrived.

REFERENCES:
patent: 7768867 (2010-08-01), Nishio et al.
patent: 2003-099321 (2003-04-01), None
patent: 2003-151271 (2003-05-01), None
patent: 2010044659(A) (2010-02-01), None

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