Memory configuration of a composite memory device

Details Memory configuration of a composite memory device Memory configuration of a composite memory device

1998-05-18

2000-09-05

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518529, 36518904, 365218, G11C 1604

Patent

active

061152927

ABSTRACT:
The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

REFERENCES:
patent: 5343434 (1994-08-01), Noguchi
patent: 5469390 (1995-11-01), Sasaki et al.
patent: 5539688 (1996-07-01), Yiu et al.
patent: 5596530 (1997-01-01), Lin et al.
patent: 5630093 (1997-05-01), Holzhammer et al.
patent: 5793676 (1998-08-01), Bedarida et al.
patent: 5818848 (1998-10-01), Lin et al.
patent: 5821909 (1998-10-01), Yiu et al.
Atmel, 4 Megabit 5-volt Flash with 265K E.sup.2 PROM Memory, AT29C432 Concurrent Flash, pp. 1-11.

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