Memory compiler with multiple selectable core elements

Details Memory compiler with multiple selectable core elements Memory compiler with multiple selectable core elements

1991-12-20

1994-09-20

LaRoche, Eugene R.

Static information storage and retrieval

Format or disposition of elements

365 63, G11C 502

Patent

active

053495527

ABSTRACT:
Methods and devices for efficiently using substrate space to form memory devices on integrated circuits, and in particular, in application specific integrated circuits. More particularly, a shared decoder and control logic are used for selectively accessing and addressing plural types of memory (e.g., RAM and ROM cells). Further, each memory cell of a memory array is programmed as a particular type of memory cell during circuit layout design. Therefore, specific rows, columns, or single bits of the memory cell array can be designated as specific types of memory.

REFERENCES:
patent: 4525809 (1985-06-01), Chiba
patent: 4964078 (1990-10-01), Jandu
patent: 5040143 (1991-08-01), Matsumura
patent: 5101376 (1992-03-01), Noguchi
patent: 5121355 (1992-06-01), Gubbels
VLSI Technology, Inc., "2-Micro Silicon Compilers", pp. CROMO1-1, CROM-1-10 through CROMO1-13.
Microelectronics Digital and Analog Circuits and Systems, by Jacob Millman, Ph.D., 1979 "McGraw-Hill", pp. 193-199 and 276-279.

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