Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal gain processing
Patent
1983-05-20
1985-12-24
Richardson, Robert L.
Dynamic information storage or retrieval
Binary pulse train information signal
Binary signal gain processing
358336, 358339, 360 362, 360 381, 360 39, 360 51, H04N 576
Patent
active
045610835
ABSTRACT:
A memory circuit write-in system comprises a first circuit for supplying a digital signal including a time base fluctuation component, where one frame of the digital signal is constituted by at least a synchronizing signal and information data and the digital signal has a first repetition frequency with a period of one frame of the digital signal, a memory circuit for writing therein and reading out therefrom the digital signal supplied from the first circuit, and a second circuit for applying a write-in control signal to the memory circuit. The write-in control signal includes no time base fluctuation component and has a second repetition frequency substantially equal to the first repetition frequency, and the memory circuit is controlled by the write-in control signal so that write-in of the digital signal is carried out with a write-in period in a range of two times within the one frame period.
REFERENCES:
patent: 4134131 (1979-01-01), Hopkins, Jr.
patent: 4215376 (1980-07-01), Mach
patent: 4477842 (1984-10-01), Kaneko
Iwasaki Yoshiki
Komura Makoto
Masuda Isao
Nishikawa Kazunori
Takahashi Nobuaki
Richardson Robert L.
Victor Company of Japan Ltd.
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