Memory circuit with element for the memorizing of word line sele

Details Memory circuit with element for the memorizing of word line sele Memory circuit with element for the memorizing of word line sele

1993-09-16

1996-05-07

Cunningham, Terry

Static information storage and retrieval

Addressing

Plural blocks or banks

365218, G11C 800

Patent

active

055153283

ABSTRACT:
In a memory circuit, the word line decoder includes a memorization logic circuit that provides for the memorizing of the selection of the word lines. This memorization provides for the simultaneous erasure of all the words lines for which the selection has been memorized.

REFERENCES:
patent: 4835423 (1989-05-01), de Ferron et al.
patent: 4837742 (1989-06-01), Silvestre de Ferron
patent: 4851894 (1989-07-01), de Ferron et al.
patent: 4947378 (1990-08-01), Jinbo et al.
patent: 4970692 (1990-11-01), Ali et al.
W. E. Proebster et al, "High-Speed Chip Card Reading", IBM Technical Disclosure Bulletin, vol. 27, No. 4B, Sep. 1984, pp. 2439-2441.
Patent Abstracts of Japan, vol. 10, No. 30 (P-426) (2087), Feb. 5, 1986.

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