Memory circuit for changing boost ratio

Details Memory circuit for changing boost ratio Memory circuit for changing boost ratio

1999-02-08

2000-12-12

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

G11C 1134

Patent

active

061607363

ABSTRACT:
The present invention is a memory circuit having memory cell array transistors with floating gates, wherein the boost ratio of the boosted voltage generating circuit is varied so that the boosted voltage level for driving wordlines during reading becomes constant depending on the power source voltage level. Specifically, when the power source voltage decreases, the boost ratio increases and when the power source voltage increases, the boost ratio decreases. As a result, the boosted voltage for driving wordlines during reading can be maintained within a prescribed range and appropriate read operations can be ensured.

REFERENCES:
patent: 5986935 (1999-11-01), Iyama et al.

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