Memory circuit enchancement to stablize the signal lines with ad

Details Memory circuit enchancement to stablize the signal lines with ad Memory circuit enchancement to stablize the signal lines with ad

1985-12-19

1988-08-02

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307530, 365202, 365205, 365208, 365149, G11C 1124, G11C 1140, G06F 100, H03K 19003

Patent

active

047615710

ABSTRACT:
A memory system having voltage level circuit switching portions operated between signal lines stabilized by additional capacitance.

REFERENCES:
patent: 4031522 (1977-06-01), Reed
patent: 4207616 (1980-06-01), Heeren
patent: 4397003 (1983-08-01), Wilson et al.
patent: 4476547 (1984-10-01), Miyasaka
patent: 4598389 (1986-07-01), Duvvury et al.
patent: 4622655 (1986-11-01), Suzuki
Ho et al., "Noise Cancellation with the Dummy Word Line", IBM Tech. Discl. Bull., vol. 14, No. 11, pp. 3351-3352, Apr. 1972.

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