Memory circuit, and method for reading out data contained in...

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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Details

C365S189020, C365S191000, C365S230020, C365S230060, C711S105000, C711S156000

Reexamination Certificate

active

11135212

ABSTRACT:
The present invention relates to a memory circuit having a memory cell array for storing data, and having a command decoding circuit for receiving command signals, and having a setting memory for storing an item of operating information that is specific to a memory circuit, the command decoding circuit performing a function in the memory circuit on the basis of applied drive commands, wherein the command decoding circuit is configured in such a manner that, during an initialization mode, the operating information can be read out on the basis of a predetermined drive command that is supplied to the command decoding circuit, and in such a manner that, during a normal operating mode, a function that is different therefrom can be performed with the aid of the predetermined drive command.

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patent: 6381685 (2002-04-01), Dell et al.
patent: 2001/0003198 (2001-06-01), Wu
patent: 2003/0110368 (2003-06-01), Kartoz
patent: 2003/0185082 (2003-10-01), Schnell
patent: 2003/0204674 (2003-10-01), Ryan et al.
patent: 2004/0205433 (2004-10-01), Gower et al.
patent: 2004/0257847 (2004-12-01), Matsui et al.
patent: 2005/0162948 (2005-07-01), Swanson et al.
patent: 19952947 (2001-05-01), None

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