Memory chips and judgment circuits thereof

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S189050

Reexamination Certificate

active

08004870

ABSTRACT:
A memory chip is provided. The memory chip operates at modes and includes an option pad and a judgment circuit. The judgment circuit is coupled to the option pad generates a judgment signal according to the current status of the option pad. The judgment signal indicates which mode the memory chip is operating at. The judgment circuit includes a detection unit and a sampling unit. The detection unit is coupled to a first voltage source and the option pad and further controlled by a control signal to generate at least one detection signal according to the current status of the option pad. The sampling unit samples the at least one detection signal after the control signal is asserted to generate the judgment signal. When the control signal is asserted, a level of the at least one detection signal is varied by a voltage provided by the first voltage source.

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patent: 2005/0216676 (2005-09-01), Takahashi et al.
patent: 2007/0115759 (2007-05-01), Sano

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