1993-10-15
1995-08-29
Beausoliel, Jr., Robert W.
Excavating
371 492, 371 48, G06F 1134
Patent
active
054468736
ABSTRACT:
A new memory checker comprised of a parity checker (51), a bit storage (52), and a parity generator (53), and installed in the memory module (20) of a computer system (10) for checking data error, wherein the parity checker (51) receives the data bus and input parity signal from the computer system (10) to check out error from the data been fetched from the memory module (20) and then to provide an interrupt signal (43) to the computer system (10) upon the checking of an error.
REFERENCES:
patent: 4360915 (1982-11-01), Sindelar
patent: 4472805 (1984-09-01), Wacyk et al.
patent: 4926426 (1990-05-01), Scheuneman et al.
patent: 5255230 (1993-10-01), Chan et al.
Beausoliel, Jr. Robert W.
Brain Power Co.
Chung Phung My
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