Memory check apparatus and method for checking data upon...

Data processing: vehicles – navigation – and relative location – Vehicle control – guidance – operation – or indication – With indicator or control of power plant

Reexamination Certificate

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Details

C701S115000

Reexamination Certificate

active

06216084

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATION
This application relates to and incorporates herein by reference Japanese Patent Application No. 10-286930 filed on Oct. 8, 1998.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory check apparatus and method for checking abnormality of data such as leaned control values and diagnosis results stored in a memory.
2. Background of the Invention
An electronic control apparatus for vehicle engines has a backup RAM, which is continuously supplied with electric power even after an ignition switch is turned off so that various data such as engine diagnosis results and learned control values are kept stored to be used later in engine control and diagnosis.
Those data stored in the backup RAM may be broken or changed due to external electrical noises, etc. It is therefore proposed to check periodically the backup RAM and initialize the memory upon detection of abnormality of the stored data.
In one proposal, all the memory data are checked every time the ignition switch is turned on. However, this method cannot check abnormal changes of the data, which may occur after the ignition switch is turned on and the control apparatus is in engine control operation, resulting in erroneous calculation of the control quantity.
In another proposal, the memory data are checked at every specified time interval after the ignition switch is turned on (JP-A-6-250940), or within an idle period in which no calculation program is executed (JP-A-10-83355). In this method also, the control quantity may be calculated erroneously due to memory data abnormality occurring between timings of successive memory checking.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a memory check apparatus and method, which obviates the possibility of calculation of erroneous control data due to changes of memory data.
According to the present invention, not all memory data are checked but only data read out from a memory to be used for control calculation are checked, before the data are actually used. Thus, all the memory data necessary are ensured to be checked in a short period of time, and improper control operation resulting from erroneous data can be obviated.


REFERENCES:
patent: 4587655 (1986-05-01), Hirao et al.
patent: 4862371 (1989-08-01), Maekawa
patent: 4896276 (1990-01-01), Saglimbeni et al.
patent: 4943924 (1990-07-01), Kanegae et al.
patent: 5047944 (1991-09-01), Ishikawa et al.
patent: 5119381 (1992-06-01), Yamamoto
patent: 5668726 (1997-09-01), Kondo et al.
patent: 6-250940 (1994-09-01), None
patent: 10-83355 (1998-03-01), None

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