Patent
1985-10-01
1988-02-16
Edlow, Martin H.
357 2313, 357 236, 357 237, 357 59, H01L 2702
Patent
active
047258756
ABSTRACT:
A memory cell has a pair of cross-coupled inverters, such as a CMOS pair. Diodes are coupled in series with the transistors to reduce the possibility of radiation-induced currents in the transistors causing a change in state of the cell by providing resistance that increases the cell time constant. The transistors and the diodes are formed in the body of a semiconducting material. The diodes require at most only a small additional cell area as compared with a cell that does not have the diodes.
REFERENCES:
patent: 3476617 (1969-11-01), Robinson
patent: 3983620 (1976-10-01), Spadea
patent: 4199773 (1980-04-01), Goodman et al.
patent: 4468852 (1984-09-01), Cerofolini
patent: 4491859 (1985-01-01), Hijiya et al.
Napoli et al, "CMOS/SOS 4K Rams Hardened to 100 Krads(Si)", IEEE Trans. on Nuclear Science, vol. NS-29, Dec. 1984, pp. 1707-1711.
Edlow Martin H.
General Electric Co.
Limberg Allen LeRoy
Mintel William A.
Steckler Henry I.
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