Memory cell with decoupled supply voltage while writing

Details Memory cell with decoupled supply voltage while writing Memory cell with decoupled supply voltage while writing

1975-03-13

1976-07-20

Hecker, Stuart N.

Communications: electrical

Digital comparator systems

340173R, G11C 700, G11C 1142

Patent

active

039710041

ABSTRACT:
A semiconductor memory cell whose supply voltage is decoupled from the cell voltage bus during a write operation. Automatic return of the bus to the supply voltage level once the static state is reached, even though a write command is still present, is achieved by supplying operating voltage to the cell bus from one of the data lines via a conducting transistor.

REFERENCES:
patent: 3879621 (1975-04-01), Cavaliere et al.
Moore et al., Monolithic Memory Restore Circuit Pair, IBM Technical Disclosure Bulletin, vol. 14, No. 6, 11/71, S27170019, pp. 1687-1688.

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