Memory cell structure of semiconductor memory device

Details Memory cell structure of semiconductor memory device Memory cell structure of semiconductor memory device

1990-07-06

1991-09-17

Hille, Rolf

357 55, 357 41, H01L 2968, H01L 2906, H01L 2702

Patent

active

050499564

ABSTRACT:
In a memory call of an EPROM, a drain region, a channel region, and a source region are formed in a direction perpendicular to the surface of a semiconductor substrate. A trench is provided, which penetrates the drain region and the channel region and reaches the source region. A floating gate and a control gate are formed in the trench, in a direction perpendicular to the surface of the semiconductor substrate.

REFERENCES:
patent: 4222063 (1980-09-01), Rodgers
patent: 4929988 (1990-05-01), Yoshikawa

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