Memory cell structure

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field

Reexamination Certificate

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C257S422000, C257SE43004, C257SE27006

Reexamination Certificate

active

11093652

ABSTRACT:
A memory cell structure. A first conductive line is cladded by at least two first ferromagnetic layers respectively having a first easy axis and a second easy axis, a nano oxide layer located between the first ferromagnetic layers, and a first pinned ferromagnetic layer. The first and second easy axes are 90 degree twisted-coupled with the first easy axis parallel to the length of the first conductive line and the second easy axis perpendicular to the length of the first conductive line. A storage device is adjacent to the first conductive line, receiving a magnetic field generated from a current flowing through the first conductive line.

REFERENCES:
patent: 5966012 (1999-10-01), Parkin
patent: 6639291 (2003-10-01), Sin et al.
patent: 2004/0141367 (2004-07-01), Amano et al.

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