Memory cell heights

Details Memory cell heights Memory cell heights

2011-03-01

2011-03-01

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185100, C365S185260, C257S443000, C257S315000, C257S316000, C257S314000, C408S212000, C408S212000, C408S212000

Reexamination Certificate

active

07898856

ABSTRACT:
Embodiments of the present disclosure provide methods, arrays, devices, modules, and systems for memory cell heights. One array of memory cells includes a number of semiconductor pillars having a number of charge storage nodes, each of the charge storage nodes being associated with a respective number of pillars and separated from the respective pillars by a dielectric. The array also includes a number of conductively coupled gates, each of the number of gates being associated with a respective one of the number of storage nodes. At least two pillars in the array have different heights.

REFERENCES:
patent: 6191448 (2001-02-01), Forbes et al.
patent: 6380765 (2002-04-01), Forbes et al.
patent: 7388251 (2008-06-01), Forbes et al.
patent: 2004/0004863 (2004-01-01), Wang
patent: 2006/0028867 (2006-02-01), Forbes et al.

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