Memory cell array of planar cell structure

Details Memory cell array of planar cell structure Memory cell array of planar cell structure

1990-06-12

1991-09-24

Prenty, Mark

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 68, 357 71, 357 59, 365182, H01L 2710, H01L 2348, H01L 2904, G11C 1134

Patent

active

050518097

ABSTRACT:
A memory cell array has a continuous diffusion region for source regions of a plurality of memory transistors; a continuous diffusion region for drain regions of the plurality of memory transistors; the both diffusion regions being formed in a substrate in parallel to each other; and word lines electrically insulated from the both diffusion regions and formed in a direction crossing the both diffusion regions; the word lines being composed of polycrystal silicon films in first and second layers and alternately arranged and electrically insulated from each other. A region of the memory transistors for ion implantation is wider than a channel region of the memory transistors. The region of the memory transistors for ion implantation is formed up to the channel region of the memory cell transistors provided by the word lines in the second layer. A thick oxide film is formed on the both diffusion regions.

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