Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2006-02-28
2006-02-28
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
Reexamination Certificate
active
07006370
ABSTRACT:
A memory cell architecture is provided herein for increasing memory speed, performance and robustness within a highly compact memory cell layout. Though only a few embodiments are provided herein, a feature common to all embodiments includes a novel means for sharing one or more contact structures between vertically adjacent memory cells. In particular, one or more contact structures may be shared unequally between two vertically adjacent memory cells for reducing a vertical dimension, or length, of the memory cell. Other features are disclosed for producing the highly compact memory cell layout. The various features of the present invention may be combined to produce high-performance, high-density memory arrays.
REFERENCES:
patent: 6222758 (2001-04-01), Higashide
patent: 6778462 (2004-08-01), Castagnetti et al.
patent: 6847577 (2005-01-01), Ishiguro
Castagnetti Ruggero
Ramesh Subramanian
Venkatraman Ramnath
Daffer McDaniel LLP
Le Thong Q.
LSI Logic Corporation
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