Static information storage and retrieval – Addressing
Patent
1986-12-23
1988-08-30
Fears, Terrell W.
Static information storage and retrieval
Addressing
365154, 365189, G11C 1300
Patent
active
047681721
ABSTRACT:
A memory cell comprises a memory which memorizes binary information in a static manner, a first delivery device which gives the binary information to a first bit line based on the potential of a first word line, and a second delivery device which gives the binary information memorized in the memory to a second word line different from the first word line, without forming a current path between the memory and a second bit line different from the first bit line.
REFERENCES:
patent: 4661928 (1987-04-01), Yasuoka
CICC, 1982 (pp. 311-314); Stephen Glen Bowers.
Takada et al., "RAM Buried Gate Array" (SSD84-59), published by Electron Communication Society of Japan, 1984, pp. 23-29.
Fears Terrell W.
Kabushiki Kaisha Toshiba
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