Memory cell

Communications: electrical – Digital comparator systems

Patent

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Details

307238, 307279, G11C 1140

Patent

active

039640310

ABSTRACT:
A memory cell utilizing first and second cross-coupled CMOS inverters connected to a digit line. During a read command, one inverter is disconnected from the input node of the other inverter to prevent loss of the stored information.

REFERENCES:
patent: 3725881 (1973-04-01), Dellor

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