Memory card circuit with power-down control of access buffer

Details Memory card circuit with power-down control of access buffer Memory card circuit with power-down control of access buffer

1991-09-17

1993-09-14

Clawson, Jr., Joseph E.

Static information storage and retrieval

Powering

Data preservation

365 52, 365226, 307443, 307475, 235441, 235492, G11C 1400

Patent

active

052455823

ABSTRACT:
A conventional memory card circuit has a construction where an input terminal and an output terminal of storage means are directly connected with a terminal unit. In consequence, the conventional memory card circuit has a disadvantage that the stored content of the storage means might be damaged when a signal applied from the terminal unit is unstable at the time of inserting or detaching a memory card into or from the terminal unit. Therefore, according to the present invention, a buffer is provided in each of input and output terminals of storage means and the storage means is cut off from outside by the buffer at the time of inserting or detaching a memory card into or from a terminal unit, whereby the stored content of the storage means can be prevented from being damaged.

REFERENCES:
patent: 4007355 (1977-02-01), Moreno
patent: 4288865 (1981-09-01), Graham
patent: 4591742 (1986-05-01), Morito
patent: 4800533 (1989-01-01), Arakawa
patent: 4912346 (1990-03-01), Mizuta
patent: 4962485 (1990-10-01), Kato et al.
patent: 4985870 (1991-01-01), Faraci
patent: 4990760 (1991-02-01), Tomari et al.
patent: 5016223 (1991-05-01), Kimura et al.
patent: 5058074 (1991-10-01), Sakamoto

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