Memory cache with automatic alliased entry invalidation and meth

Details Memory cache with automatic alliased entry invalidation and meth Memory cache with automatic alliased entry invalidation and meth

1994-01-03

1996-08-27

Chan, Eddie P.

Boots, shoes, and leggings

395455, 395420, 364253, 36424341, 364DIG1, G06F 1212

Patent

active

055509959

ABSTRACT:
A memory cache (14) has a semi-associative cache array (50), a cache reload buffer (40), and a cache reload buffer driver (42). The memory cache writes received data to the cache reload buffer and waits until the data is requested again before it invalidates any cache aliased entries in the semi-associative cache array. This invalidation step requires no dedicated cycle but instead is a result of the memory cache being able to simultaneously read from the semi-associative cache array and the cache reload buffer.

REFERENCES:
patent: 4669043 (1987-05-01), Kaplinsky
patent: 5367660 (1994-11-01), Gat et al.
patent: 5386519 (1995-01-01), Nakamura et al.

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