Boots – shoes – and leggings
Patent
1988-03-01
1989-05-09
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 940, G06F 900
Patent
active
048294250
ABSTRACT:
An I/O processor for controlling data transfer between a local bus and an I/O bus. An Execution Unit, an I/O bus sequencer, and a local bus sequencer are connected to a register file. The register file is uniformly addressed and each of the Execution Unit, the local bus sequencer, and the I/O bus sequencer have read/write access to the register file. The register file is comprised of a plurality of register sets. The Execution Unit includes a programmed processor which is programmed to allocate the register sets among tasks running on the processor by passing register-set descriptors between the tasks in the form of messages. The local bus sequencer includes a packet-oriented multiprocessor bus, there being a variable number of bytes in each of the packets. The I/O sequencer includes logic for multibyte sequencing of data at a bus-dependent data rate between the I/O bus and the register file. Each of the tasks includes a task frame, each task frame including register-set pointers. The register-set pointers map between logical addresses used in the instructions of the tasks used to access the pointers and physical register-set addresses used to access the register. Programmed logic in each of the Execution Unit, the local bus sequencer, and the I/O bus sequencer dynamically allocate the register sets to the sending and destination tasks.
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Bain, Jr. William L.
Carson David G.
Cox George W.
Duzett Robert C.
Hosler Brad W.
Intel Corporation
Lamb Owen L.
Nguyen Viet Q.
Shaw Gareth D.
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