Memory bank switching apparatus

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Details

G06F 1206

Patent

active

047137592

ABSTRACT:
A memory bank switching apparatus equipped with a bank switching register, wherein a specific address signal within a prescribed address scope for access to ROMs is outputted onto an address bus, and data relative to the address of a memory bank to be used subsequently is outputted onto a data bus, so that a location in the bank switching register is selected by the address signal. Then the data on the data bus is written in the bank switching register, thereby enabling only the memory bank selected according to the content of the bank switching register.

REFERENCES:
patent: 3737860 (1973-06-01), Sporer
patent: 4118773 (1978-10-01), Raguin et al.
patent: 4156928 (1979-05-01), Inose et al.
patent: 4368515 (1983-01-01), Neilsen

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