Memory bank structure

Details Memory bank structure Memory bank structure

2007-02-27

2007-02-27

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S203000

Reexamination Certificate

active

11023980

ABSTRACT:
The present invention relates to a memory bank structure. The memory bank structure includes: a plurality of sub-banks identified by a predetermined additional address; a plurality of local input/output line precharge units for precharging local input/output lines included in each of the sub-banks; and a plurality of local input/output line precharge control units for controlling a precharge operation of the plurality of local input/output line precharge units. Under this specific memory bank structure, the precharge operation is performed selectively at predetermined regions of the memory bank structure and as a result, unnecessary power dissipation is reduced.

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patent: 2004/0240290 (2004-12-01), Lee

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