Memory bank signal coupling buffer and method

Details Memory bank signal coupling buffer and method Memory bank signal coupling buffer and method

2011-04-19

2011-04-19

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S189011, C365S230030

Reexamination Certificate

active

07929329

ABSTRACT:
A memory array contains a plurality of banks coupled to each other by a plurality of data lines. Each of the data lines is divided into a plurality of segments within the array. Respective bidirectional buffers couple read data from one of the segments to another in a first direction, and to couple write data from one of the segments to another in a second direction that is opposite the first direction. The data lines may be local data read/write lines that couple different banks of memory cells to each other and to respective data terminals, digit lines that couple memory cells in a respective column to respective sense amplifiers, word lines that activate memory cells in a respective row, or some other signal line within the array. The memory array also includes precharge circuits for precharging the segments of respective data lines to a precharge voltage.

REFERENCES:
patent: 6882555 (2005-04-01), Fenstermaker et al.
patent: 7737727 (2010-06-01), Aranovsky

Affiliated with

Also associated with

Rating

Memory bank signal coupling buffer and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory bank signal coupling buffer and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory bank signal coupling buffer and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2729221