Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2007-09-18
2007-09-18
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185190, C365S185120, C365S185330
Reexamination Certificate
active
11171895
ABSTRACT:
In the multi level/bit per cell memory array, a flag cell indicates pseudo single bit per cell configuration for one or more cells of the memory array. The output of the cell or cells associated with the flag cell is a single bit when the flag cell is set. The cell or cells associated with the flag cell operate as multi level/bit per cell cells when the flag cell is not set. The flag cell of the memory array may also be a multi level/bit per cell cell that is read to provide a single bit output. Multiple flag cells may be provided and associated with various cells or groups of cells so that these cells or groups of cells may be operated in a user selectable pseudo single bit configuration.
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Haque Rezaul
Rahman Ahsanur
Tedrow Kerry D.
Intel Corporation
Marshall & Gerstein & Borun LLP
Tran Andrew Q.
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