Memory array with an array reorganizer

Details Memory array with an array reorganizer Memory array with an array reorganizer

1986-04-21

1988-07-26

Fears, Terrell W.

Static information storage and retrieval

Read only systems

Semiconductive

365189, 365203, G11C 1140

Patent

active

047605553

ABSTRACT:
A non-volatile memory device formed on a face of a semiconductor substrate which includes an array of electrically programmable read only memory cells, a Y address decoder coupled to said array and first and second sets of input/output lines coupled to said Y address decoder. Switch means isolates either the first or second set of input/output lines from the Y decoder. A programmable non-volatile memory element is coupled to programming ones of the input lines and is programmable into a programmed state from an unprogrammed state in response to a programming voltage applied to programming ones of the first set of input lines. A control circuit is coupled to the switch means and to the memory element for isolating the first or second set in response to an external signal applied to a selecting one of the first set of input/output lines and in response to the state of the non-volatile memory element.

REFERENCES:
patent: 4646265 (1987-02-01), Takamizawa et al.

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