Memory array selection mechanism

Details Memory array selection mechanism Memory array selection mechanism

1979-12-14

1981-08-18

Springborn, Harvey E.

Boots, shoes, and leggings

G06F 1300

Patent

active

042850398

ABSTRACT:
A computer system includes multiple memory arrays, each potentially as large as the maximum number of locations for which the associated processor can generate unique addresses. During the processing of such instructions a memory array selection mechanism permits data to be read from or written into any of the memory arrays. Program control may be transferred from an instruction in one memory array to an instruction in another memory array. In addition, memory references may be made to more than one memory array.

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patent: 4080659 (1978-03-01), Francini
patent: 4155118 (1979-05-01), Lamiaux
Memory Extension Techniques for Minicomputers, Poppendieck et al., Compute 5/77 pp. 5-8 and 72-75.
Control Computer and IM-Byte Memory System, Micro Processor Computer Data Stack-undated-two pp.

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