Memory array address buffer with level shifting

Details Memory array address buffer with level shifting Memory array address buffer with level shifting

1978-07-31

1979-06-26

Hecker, Stuart N.

Static information storage and retrieval

Addressing

307DIG1, G11C 800

Patent

active

041595408

ABSTRACT:
An improved electrically alterable non-volatile memory for storing information is described incorporating an array of memory cells composed of variable threshold field effect transistors, means for writing and reading information into and out of the array which includes precharged circuitry to provide predetermined voltages on the gate, source and drain electrodes of the transistors in the array before writing or reading and row decode circuitry on both sides of the array to permit closer spacing of the variable threshold transistors in the array.

REFERENCES:
patent: 3848237 (1974-11-01), Geilhufe et al.
patent: 3976984 (1976-08-01), Hirasawa

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