Memory array

Details Memory array Memory array

2007-08-21

2007-08-21

Dinh, Son (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S063000

Reexamination Certificate

active

11262651

ABSTRACT:
A memory array includes a plurality of memory banks, each having a plurality of sectors and a plurality of sector decoders, each sector decoder operatively associated with a sector. A first plurality of lines provides first signals, and a second plurality of lines provides second signals. A first decoder apparatus is operatively associated with the first plurality of lines for receiving the first signals and for providing a first address signal by means of a first single line to a sector decoder of a memory bank. A second decoder apparatus is operatively associated with the second plurality of lines for receiving the second signals and for providing a second address signal by means of a second single line to a sector decoder of a memory bank.

REFERENCES:
patent: 5691945 (1997-11-01), Liou et al.
patent: 6788612 (2004-09-01), Hsu et al.
patent: 6909641 (2005-06-01), Naso et al.
patent: 2004/0090825 (2004-05-01), Nam et al.

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