Memory architecture for storing twisted pixels

Details Memory architecture for storing twisted pixels Memory architecture for storing twisted pixels

1992-10-21

1993-12-07

Harkcom, Gary V.

395164, 395165, G06F 1562

Patent

active

052690032

ABSTRACT:
An arrangement for addressing a frame buffer memory including apparatus for selecting from the address bits designating a position in the frame buffer of a pixel to be displayed on an output display the bits indicating the word address of the pixel in a particular row of the frame buffer, apparatus for multiplying the word address by a fraction to provide a new word address, apparatus for recombining the new word address with the row address to provide a new address in the frame buffer for the information regarding the pixel to be displayed, and apparatus for controlling the storage of a data word describing the pixel beginning at a selected byte of the data word whereby the storage in the frame buffer of an unused portion of a data word describing the pixel may be eliminated.

REFERENCES:
patent: 5043713 (1991-08-01), Katsura et al.
patent: 5047958 (1991-09-01), Comins et al.
patent: 5162788 (1992-11-01), Lundblad et al.

Affiliated with

Also associated with

Rating

Memory architecture for storing twisted pixels does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory architecture for storing twisted pixels, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory architecture for storing twisted pixels will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2021942